The invention relates to electronically controlled active bus terminators that controllably connect termination resistors to and disconnect them from corresponding computer bus conductors, and more particularly to improved bus terminator circuitry that presents very low capacitance to the bus conductors when the termination resistors are electronically disconnected from the corresponding bus conductors.
U.S. Pat. No. 4,920,339 (Friend et al.) and U.S. Pat. No. 5,272,396 (Mammano et al.), the article "Push SCSI Performance to the Limit", by Paul Boulay et al., Electronic Design, May 10, 1990, pages 85-92, and the Texas Instruments application brief entitled "Single-Ended SCSI Termination Using the TL2218-285 Terminator (undated), are believed to generally indicate the state of the relevant art.
Many small computer systems are quite expandable. This means that various "add on" modules or printed circuit boards can be plugged into or electronically switched onto the computer bus, creating new "ends" of the bus. For example, many computer buses are "daisy chained" through a large number of plugged in modules. It is well known that computer bus conductors, such as SCSI (Small Computer Systems Interface) bus conductors, need to be terminated by corresponding termination resistors which match the characteristic impedance of the bus conductors to avoid undesired signal-degrading reflections at the ends of the bus conductors. Therefore it often is desirable to provide "bus terminators", or simply "terminators", in each module. Such terminators include termination resistors that can be connected under electronic control to each bus conductor or disconnected under electronic control from each bus conductor. This allows proper termination of the opposite ends of each bus conductor as the location of such ends change due to reconfiguration of the system by adding various modules and/or removing thereof from the SCSI bus.
A common configuration for SCSI bus terminations includes a 220 ohm resistor connected between a +4.25 volt power supply and a bus conductor, with a 330 ohm resistor connected between the bus conductor and ground. The Thevenin equivalent of this configuration is often implemented in integrated circuit form as a number of 110 ohm termination resistors each having a first terminal connected to a corresponding bus conductor terminal and a second terminal connected by a switch to a 2.85 volt voltage regulator output, as generally disclosed in the above mentioned Friend et al. and Mammano et al. patents. This Thevenin equivalent implementation is referred to as an "active" bus terminator. The switches are turned on in the terminators of the modules located at the ends of the SCSI bus, but in all of the other modules at intermediate locations of the SCSI bus, both the switches and the voltage regulator are turned off, electronically disconnecting the termination resistors from the corresponding bus conductors; this preserves the characteristic impedance of the bus and reduces system power dissipation.
The "active" terminator system disclosed in the Mammano et al. patent has been marketed by Unitrode Corporation as the UC5601 SCSI Active Terminator. A shortcoming of this device is that the capacitances of its output conductors are much higher than desirable when the electronically controlled active terminator is in its "turned off" or "disconnected" state.
FIG. 3 illustrates the internal connections of the UC5601 Active Terminator for one of 18 bus conductors individually and collectively referred to herein as BUS CONDUCTOR i, where i is 1,2 . . . 18, and wherein the termination resistor 17-i is actually implemented as a three-resistor, two-transistor "resistive network" as shown by numeral 98'in FIG. 4 of the Mammano et al. U.S. Pat. No. 5,272,396, issued Dec. 21, 1993, entitled "Controllable Bus Terminator With Voltage Regulator", and incorporated herein by reference. The resistive network 17-i (wherein the index i can have values of 1,2. . . N) has a large parasitic capacitance indicated by dotted lines 36 in FIG. 3 herein. Each of 18 NPN clamping transistors 37-i has its emitter connected to the corresponding bus line 11-i and its base connected to a common bias circuit output conductor 39, and has a base-to-emitter parasitic capacitance 38 as indicated by dotted lines. These two parasitic capacitances, which have a combined value of roughly 8 to 10 picofarads, permanently add to the capacitance of the SCSI Bus Conductor i connected to output terminal 17-i, regardless of the state of the NPN transistor switch 12-i. If a large number of modules each including a UC5601 active terminator are plugged into the SCSI bus, their total addition to the bus conductor capacitance is large, substantially reducing bandwidth of the bus.
Furthermore, since the i base-to-emitter capacitances 38 all are coupled to the same bias circuit output conductor 39, all of the bus conductors 11-i are capacitively coupled to each other, and a logic signal on any one of the bus conductors produces a noise signal on all of the others, increasing the likelihood of bus data errors.
In FIG. 3, the base of each clamping transistor 37-i is biased at one diode voltage above ground by the output conductor 39 of a bias circuit including diode 41 and a switched current source 40 controlled by the "disconnect" input signal of the UC5601. Clamping transistor 37-i operates to limit or prevent negative voltage "ringing" of SCSI Bus Conductor i (to which output terminal 11-i is connected), i.e., to prevent Bus Conductor i from swinging below ground. The physical size of NPN switch transistor 12-i is quite large, its "on" resistance being only about 10 ohms. Its large parasitic collector-to-substrate capacitance 35 and large emitter-base capacitance 34 are indicated by dotted lines.
Thus, the prior art structure shown in FIG. 3 presents a large output capacitance on each output terminal 11-i. If, for example, many such electronically controlled active terminators are plugged into the SCSI bus, with only the ones located at opposite ends of the bus being turned on, the "intermediate" electronically controlled active terminators all also add to the total bus conductor capacitance, and therefore "rob" current from the data signals, thereby corrupting the signal waveshapes and reducing the bus bandwidth.
Those skilled in the art will recognize that the switch transistors 12-i in the prior art circuit of FIG. 3 are very large devices which, when on, are in their fully saturated modes and therefore fall far short of being ideal switches. Their collector voltages are constant at V.sub.REG, and since their saturation resistances are only about 10 ohms, nearly all of the voltage swings of Bus Conductors i appear across 110 ohm termination resistors 17-i. The emitter and base voltages of transistor switches 12-i therefore do not vary by more than roughly 300 millivolts when the SCSI bus conductors swing between logical "1"s and "0"s.
For these reasons, it was thought that it would be impractical to connect the transistor switches 12-i directly to the output terminals 11-i, as this would require the emitter-base voltages of switch transistors 12-i to swing through the approximately 3 volt range of the bus signals. It was thought that the large amount of stored charge and the parasitic collector-substrate capacitances associated with the switch transistors would rob enough current from the logic signals on Bus Conductors i to substantially degrade the rise times and fall times of data pulses on the SCSI Bus Conductors and thereby reduce bus bandwidth and system operating speed. Those skilled in the art recognize that the market is very concerned with achieving high operating speeds, and therefore low output capacitances for bus terminators are highly desired, even at the cost of relaxing other bus terminator specifications.
Upon information and belief, the only presently known approaches to reducing the "disabled" or "disconnected" mode output terminal capacitances of present electronically controlled active bus terminators have been to (1) add semiconductor manufacturing process steps to thicken the insulating oxides on which the thin film termination resistors (such as 17-i) are disposed to reduce the associated parasitic capacitances 36 (FIG. 3), and (2) to eliminate the clamping transistors such as 37-i so as to eliminate their parasitic capacitances 38. However, increasing the cost and complexity of manufacturing integrated circuit electronically controlled active terminators obviously is undesirable, and loss of the output terminal clamping function in some cases is undesirable.
U.S. Pat. No. 5,336,948 issued to Jordan on Aug. 9, 1994 discloses a circuit 44 in FIG. 3 thereof that includes the combination of an "active negation emulator" 34 and an active termination network 28, either of which can be connected to a bus conductor 12 by a single pole, triple throw switch 46. The active negation emulator circuit 34, when connected to bus conductor 12 by switch 46, senses whether the signal on bus conductor 12 is greater than a 1.2 volt mid-range threshold, and if it is, supplies an additional "boost" current into bus conductor 12 to aid it in reaching a "high" logic level of at least 2.8 volts. If switch 46 instead connects the bus conductor 12 to termination network 28, termination network 28 provides a matched transmission line termination into a 2.85 volt regulated voltage source so as to eliminate signal reflections at the end of the bus conductor 12.
The termination resistor R1 of the termination network 28 is connected between switch 46 and the output of the voltage regulator 32. This is a reversal of the connection shown in the above identified Mammano et al. patents, wherein the termination resistor is connected between the bus conductor and the switch, the switch being connected between the termination resistor and the output of the voltage regulator. The reversal of the position of switch 46 and termination resistor R1 relative to their positions in the Mammano et al. patents is forced by the need to position switch 46 so that either active negation emulator 34 or termination network 28 can be connected to bus conductor 12. When termination network 28 is disconnected and active negation emulator 34 is connected, the capacitances associated with the non-inverting input of comparator 52, resistor R3, diode D3, the emitter of transistor Q1, and the associated conductors all are added to the capacitance on the output port of the combination emulator/terminator circuit 44. Also, if single pole, triple throw switch 46 is implemented as an electronic switch, it would be constructed as a combination of three single pole, single throw switches with a common connection at node 48, which then would have a high capacitance. This high capacitance is undesirable for the reasons mentioned above. The desirability of minimizing the capacitance of the output terminal of the bus termination device when it is electronically disconnected from the bus conductor is not recognized in the Jordan patent.
Thus, there is a presently unmet need for an improved electronically controlled active terminator integrated circuit which presents low "off" or "disabled" mode output terminal capacitance without increasing semiconductor manufacturing process cost. There also is an unmet need for such an improved electronically controlled active terminator integrated circuit which does not eliminate the function of the output terminal clamping transistors of the prior art.